Invention Grant
US08148768B2 Non-volatile memory cell with self aligned floating and erase gates, and method of making same
有权
具有自对准浮动和擦除栅极的非易失性存储单元及其制造方法
- Patent Title: Non-volatile memory cell with self aligned floating and erase gates, and method of making same
- Patent Title (中): 具有自对准浮动和擦除栅极的非易失性存储单元及其制造方法
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Application No.: US12324816Application Date: 2008-11-26
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Publication No.: US08148768B2Publication Date: 2012-04-03
- Inventor: Nhan Do , Amitay Levi
- Applicant: Nhan Do , Amitay Levi
- Applicant Address: US CA Sunnyvale
- Assignee: Silicon Storage Technology, Inc.
- Current Assignee: Silicon Storage Technology, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: DLA Piper LLP (US)
- Main IPC: H01L29/788
- IPC: H01L29/788
Abstract:
A memory device, and method of making the same, in which a trench is formed into a substrate of semiconductor material. The source region is formed under the trench, and the channel region between the source and drain regions includes a first portion that extends substantially along a sidewall of the trench and a second portion that extends substantially along the surface of the substrate. The floating gate is disposed in the trench, and is insulated from the channel region first portion for controlling its conductivity. The control gate is disposed over and insulated from the channel region second portion, for controlling its conductivity. The erase gate is disposed at least partially over and insulated from the floating gate. The erase gate includes a notch, and the floating gate includes an edge that directly faces and is insulated from the notch.
Public/Granted literature
- US20100127308A1 NON-VOLATILE MEMORY CELL WITH SELF ALIGNED FLOATING AND ERASE GATES, AND METHOD OF MAKING SAME Public/Granted day:2010-05-27
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