Invention Grant
- Patent Title: Methods of providing electrical isolation and semiconductor structures including same
- Patent Title (中): 提供电气隔离的方法和包括其的半导体结构
-
Application No.: US12700491Application Date: 2010-02-04
-
Publication No.: US08148775B2Publication Date: 2012-04-03
- Inventor: Brent D. Gilgen , Paul Grisham , Werner Juengling , Richard H. Lane
- Applicant: Brent D. Gilgen , Paul Grisham , Werner Juengling , Richard H. Lane
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/4763

Abstract:
Methods of isolating gates in a semiconductor structure. In one embodiment, isolation is achieved using a spacer material in combination with fins having substantially vertical sidewalls. In another embodiment, etch characteristics of various materials utilized in fabrication of the semiconductor structure are used to increase an effective gate length (“Leffective”) and a field gate oxide. In yet another embodiment, a V-shaped trench is formed in the semiconductor structure to increase the Leffective and the field gate oxide. Semiconductor structures formed by these methods are also disclosed.
Public/Granted literature
- US20100133609A1 METHODS OF PROVIDING ELECTRICAL ISOLATION AND SEMICONDUCTOR STRUCTURES INCLUDING SAME Public/Granted day:2010-06-03
Information query
IPC分类: