A data-processing circuit includes a distributor. Raw image data of horizontal 3840 pixels×vertical 2160 pixels that is periodically outputted from a CMOS-type imaging device is divided by the distributor into four blocks of partial image data. The divided four blocks of partial image data are subjected to a pre-process in parallel by first to fourth pre-processing blocks. On the other hand, raw image data of horizontal 1280 pixels×vertical 960 pixels that is periodically outputted from a CCD-type imaging device is serially subjected to a pre-process by a fifth pre-processing block. The number of pixels of the raw image data outputted from the CCD-type imaging device is equal to or less than ¼ the number of pixels of the raw image data outputted from the CMOS-type imaging device. A numerical value “4” is equivalent to the number of parallel pre-processes on the raw image data outputted from the CMOS imaging device.