Invention Grant
- Patent Title: Controller and non-volatile semiconductor memory device
- Patent Title (中): 控制器和非易失性半导体存储器件
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Application No.: US12715772Application Date: 2010-03-02
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Publication No.: US08149623B2Publication Date: 2012-04-03
- Inventor: Hironori Uchikawa , Kenji Sakurada
- Applicant: Hironori Uchikawa , Kenji Sakurada
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2009-187827 20090813
- Main IPC: G11C16/04
- IPC: G11C16/04

Abstract:
A controller includes a generation unit configured to aggregate comparison results between second threshold voltage levels held in the memory cells and predetermined third threshold voltage levels, and generate a histogram of the second threshold voltage levels, an estimation unit configured to estimate statistical parameter of a distribution of the second threshold voltage levels with respect to a first threshold voltage level according to writing data, based on the histogram, and a determination unit configured to determine a fifth threshold voltage level defining a boundary of a fourth threshold voltage level indicating a read result of the memory cells from the third threshold voltage levels based on the statistical parameter in such a manner that mutual information amount between the first threshold voltage level and the fourth threshold voltage level becomes maximum.
Public/Granted literature
- US20110038212A1 CONTROLLER AND NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2011-02-17
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