Invention Grant
US08149632B2 Output circuit for a semiconductor memory device and data output method
有权
半导体存储器件的输出电路和数据输出方法
- Patent Title: Output circuit for a semiconductor memory device and data output method
- Patent Title (中): 半导体存储器件的输出电路和数据输出方法
-
Application No.: US12707140Application Date: 2010-02-17
-
Publication No.: US08149632B2Publication Date: 2012-04-03
- Inventor: Yoshinori Matsui
- Applicant: Yoshinori Matsui
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Young & Thompson
- Priority: JP2007-139104 20070525
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
An outputting transistor circuit of a push-pull structure has an outputting PMOS transistor and an outputting NMOS transistor connected in series between a first power supply and a grounded power supply. In a standby state, a voltage level of a gate terminal of the outputting PMOS transistor is set to a voltage level of a second power supply higher than a voltage level of the first power supply. In an active state, a voltage level of the gate terminal of the outputting PMOS transistor is changed to a voltage level of the first power supply in response to an active command or a read command, or in response to the state of a semiconductor memory device changing to the active state or a read state, and either the outputting PMOS transistor or the outputting NMOS transistor is turned ON in response to a data read signal from a memory cell.
Public/Granted literature
- US20100142290A1 OUTPUT CIRCUIT FOR A SEMICONDUCTOR MEMORY DEVICE AND DATA OUTPUT METHOD Public/Granted day:2010-06-10
Information query