Invention Grant
- Patent Title: Cache memory and method of operating the same
- Patent Title (中): 高速缓存和操作方法相同
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Application No.: US12058049Application Date: 2008-03-28
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Publication No.: US08151087B2Publication Date: 2012-04-03
- Inventor: Jung Keun Lee , Sang Woo Park
- Applicant: Jung Keun Lee , Sang Woo Park
- Applicant Address: KR Daejeon
- Assignee: Electronics and Telecommunications Research Institute
- Current Assignee: Electronics and Telecommunications Research Institute
- Current Assignee Address: KR Daejeon
- Agency: Ladas & Parry LLP
- Priority: KR10-2007-0117711 20071119
- Main IPC: G06F12/08
- IPC: G06F12/08

Abstract:
Provided are a cache memory using a linear hash function and a method of operating the same. The cache memory includes: a first hash function module for converting a main memory address received from a central processing unit (CPU) into a first index value using a first hash function; a second hash function module for converting the main memory address into a second index value using a second hash function; a first comparator for comparing a tag value of a data block located at the first index value in the first bank with a tag value of the main memory address; and a second comparator for comparing a tag value of a data block located at the second index value in the second bank with the tag value of the main memory address. In a pair of linear hash functions according to the present invention, each constructed with a 2m×m binary matrix, even if m is an odd number, each of the linear hash functions has the highest degree of interbank dispersion and avoids conflicts in row, column, diagonal, anti-diagonal, and rectangular patterns, so that a 2-way skewed associative cache can be constructed in relatively wide ranges.
Public/Granted literature
- US20090132784A1 CACHE MEMORY AND METHOD OF OPERATING THE SAME Public/Granted day:2009-05-21
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