A circuit and method for generating an internal power supply voltage are disclosed. The circuit includes an internal power supply voltage pre-processing unit configured to generate a first internal power supply voltage in response to an external power supply voltage in a power-up mode and a deep power-down (DPD) exit mode to provide the first internal power supply voltage to an output node, and further configured to define a transition time for the first internal power supply voltage, an internal power supply voltage generating unit configured to generate a stable second internal power supply voltage in response to the external power supply voltage to provide the second internal power supply voltage to the output node, and an initialization signal generating unit configured to generate an internal initialization signal in response to the first internal power supply voltage and the second internal power supply voltage.