Invention Grant
- Patent Title: Method and apparatus for pre-tabulating sub-networks
- Patent Title (中): 预先划分子网络的方法和装置
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Application No.: US12258403Application Date: 2008-10-25
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Publication No.: US08151227B2Publication Date: 2012-04-03
- Inventor: Steven Teig , Asmus Hetzel
- Applicant: Steven Teig , Asmus Hetzel
- Applicant Address: US CA San Jose
- Assignee: Cadence Design Systems
- Current Assignee: Cadence Design Systems
- Current Assignee Address: US CA San Jose
- Agency: Adeli & Tollen LLP
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
Some embodiments of the invention provide a method for pre-tabulating sub-networks. This method (1) generates a sub-network that performs a function, (2) generates a parameter based on this function, and (3) stores the sub-network in a storage structure based on the generated parameter. In some embodiments, the generated sub-network has several circuit elements. Also, in some embodiments, the generated sub-network performs a set of two or more functions. Some embodiments store each generated sub-network in an encoded manner. Some embodiments provide a method for producing a circuit description of a design. This method (1) selects a candidate sub-network from the design, (2) identifies an output function performed by the sub-network, (3) based on the identified output function, identifies a replacement sub-network from a storage structure that stores replacement sub-networks, and (4) replaces the selected candidate sub-network with the identified replacement sub-network in certain conditions. In some embodiments, this method is performed to map a design to a particular technology library. Some embodiments provide a data storage structure that stores a plurality of sub-networks based on parameters derived from the output functions of the sub-networks.
Public/Granted literature
- US20090106710A1 METHOD AND APPARATUS FOR SYNTHESIS Public/Granted day:2009-04-23
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