Invention Grant
US08151268B2 Multithreading microprocessor with optimized thread scheduler for increasing pipeline utilization efficiency
有权
具有优化线程调度器的多线程微处理器，可提高管道利用效率
- Patent Title: Multithreading microprocessor with optimized thread scheduler for increasing pipeline utilization efficiency
- Patent Title (中): 具有优化线程调度器的多线程微处理器，可提高管道利用效率
-
Application No.: US12684564Application Date: 2010-01-08
-
Publication No.: US08151268B2Publication Date: 2012-04-03
- Inventor: Darren M. Jones , Ryan C. Kinter , Michael Gottlieb Jensen , Sanjay Vishin
- Applicant: Darren M. Jones , Ryan C. Kinter , Michael Gottlieb Jensen , Sanjay Vishin
- Applicant Address: US CA Sunnyvale
- Assignee: MIPS Technologies, Inc.
- Current Assignee: MIPS Technologies, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Sterne, Kesslerm Goldstein & Fox P.L.L.C.
- Main IPC: G06F9/46
- IPC: G06F9/46 ; G06F15/00
Abstract:
A multithreading processor for concurrently executing multiple threads is provided. The processor includes an execution pipeline and a thread scheduler that dispatches instructions of the threads to the execution pipeline. The execution pipeline execution pipeline is configured for generating a thread context (TC) flush indicator associated with a thread context when one or more instructions of the thread context would stall in the execution pipeline. One or more instructions in the pipeline of the thread context associated with the thread context flush signal can be flushed or nullified.
Public/Granted literature
Information query
