Invention Grant
US08154071B2 Nonvolatile semiconductor memory device and method for fabricating nonvolatile semiconductor memory device
失效
用于制造非易失性半导体存储器件的非易失性半导体存储器件和方法
- Patent Title: Nonvolatile semiconductor memory device and method for fabricating nonvolatile semiconductor memory device
- Patent Title (中): 用于制造非易失性半导体存储器件的非易失性半导体存储器件和方法
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Application No.: US12467689Application Date: 2009-05-18
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Publication No.: US08154071B2Publication Date: 2012-04-10
- Inventor: Hiroyuki Ishii , Takafumi Ikeda
- Applicant: Hiroyuki Ishii , Takafumi Ikeda
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2008-130483 20080519; JP2009-108352 20090427
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L21/336

Abstract:
According to an aspect of the present invention, there is provided a method for fabricating a nonvolatile semiconductor memory device including a memory cell being formed in a first region of a semiconductor substrate and a periphery circuit being formed in a second region of the semiconductor substrate, including forming a first gate electrode material film over the semiconductor substrate via a first gate insulator in the first region, etching the first gate electrode material film and the first gate insulator using a mask having a first opening in a first element isolation of the first region, etching the semiconductor substrate to a first depth to form a first isolation groove, forming a first insulation isolation layer in the first isolation groove, forming a second insulator on the first insulation isolation layer and on the first gate electrode, removing the second insulator by anisotropic etching, etching an upper portion of the first gate electrode to a second depth to form a first concave portion on the upper portion of the first gate electrode, etching the first side-wall film and the first insulation isolation layer to a depth at a bottom surface of the first concave portion, forming a second gate insulator on the upper portion of the first gate electrode, and forming a second gate electrode material film on the second gate insulator.
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