Invention Grant
- Patent Title: Leadframe having delamination resistant die pad
- Patent Title (中): 引线框架具有防分层导片
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Application No.: US12888527Application Date: 2010-09-23
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Publication No.: US08154109B2Publication Date: 2012-04-10
- Inventor: Kapil H Sahasrabudhe , Steven A Kummerl
- Applicant: Kapil H Sahasrabudhe , Steven A Kummerl
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Steven A. Shaw; W. James Brady; Frederick J. Telecky, Jr.
- Main IPC: H01L23/495
- IPC: H01L23/495

Abstract:
A lead frame (410) including a die pad (100) for mounting at least one integrated circuit (405) thereon and a plurality of lead fingers (413). The die pad (100) includes a metal including substrate (105) having a periphery that includes a plurality of sides (111-114), an intersection of the sides forming corners (115). A first plurality of grooves including least one groove (106) is formed in a top side surface of the substrate and is associated with each of the corners (115). The groove (106) has a dimension oriented at least in part at an angle of 75 to 105 degrees relative to a bisecting line (118) originating from the corners (115). A lead-frame-based packaged semiconductor device (400) includes a lead frame (410) including at least one metal comprising die pad (418) and a plurality of lead fingers (413) around the die pad (418). At least one integrated circuit (405) is mounted on the top surface of the die pad (418), and electrically connected to the plurality of lead fingers (413). A mold compound (414) encapsulates the integrated circuit (405), wherein the mold compound (414) is present inside the first plurality of grooves to form a restraint from delaminating between the mold compound (414) and the die pad (418).
Public/Granted literature
- US20110012243A1 Leadframe Having Delamination Resistant Die Pad Public/Granted day:2011-01-20
Information query
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