Invention Grant
US08154126B2 Methods for wafer-level packaging of microelectronic devices and microelectronic devices formed by such methods
有权
用于通过这些方法形成的微电子器件和微电子器件的晶片级封装的方法
- Patent Title: Methods for wafer-level packaging of microelectronic devices and microelectronic devices formed by such methods
- Patent Title (中): 用于通过这些方法形成的微电子器件和微电子器件的晶片级封装的方法
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Application No.: US12834125Application Date: 2010-07-12
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Publication No.: US08154126B2Publication Date: 2012-04-10
- Inventor: James L. Voelz
- Applicant: James L. Voelz
- Applicant Address: US NY Mt. Kisco
- Assignee: Round Rock Research, LLC
- Current Assignee: Round Rock Research, LLC
- Current Assignee Address: US NY Mt. Kisco
- Agency: Lerner, David, Littenberg, Krumholz & Mentlik, LLP
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L23/48

Abstract:
Methods for packaging microelectronic devices, microelectronic workpieces having packaged dies, and microelectronic devices re disclosed herein. One aspect of the invention is directed toward a microelectronic workpiece comprising a substrate having a device side and a backside. In one embodiment, the microelectronic workpiece further includes a plurality of dies formed on the device side of the substrate, a dielectric layer over the dies, and a plurality of bond-pads on the dielectric layer. The dies have integrated circuitry and a plurality of bond-pads electrically coupled to the integrated circuitry. The ball-pads are arranged in ball-pad arrays over corresponding dies on the substrate. The microelectronic workpiece of this embodiment further includes a protective layer over the backside of the substrate. The protective layer is formed on the backside of the substrate from a material that is in a flowable state and is then cured to a non-flowable state.
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