A plasma display member does not cause an erroneous discharge in a display region end portion and includes: a substrate (1); a substantially stripe-shaped address electrode (2) arranged on the substrate (1); a dielectric layer (3) covering the address electrode (2) and a grid-shaped partition arranged on the dielectric layer (3) and having main walls (4) substantially parallel to the address electrode (2) and auxiliary walls (5) intersecting the main partitions (4). The auxiliary wall (5) intersecting the main wall (4) located at the outermost position among the main walls (4) located at non-display regions (7) at the right and left of a display region (6) has a bottom width identical to the bottom width (L1) of the main wall (4) located at the outermost position among the main walls (4) located at the non-display regions (7) at the right and left of the display region (6) which is multiplied by 0.3 to 1.0.