Invention Grant
US08154900B2 Method and apparatus for reducing power consumption in a content addressable memory
有权
用于降低内容可寻址存储器中的功耗的方法和装置
- Patent Title: Method and apparatus for reducing power consumption in a content addressable memory
- Patent Title (中): 用于降低内容可寻址存储器中的功耗的方法和装置
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Application No.: US12569537Application Date: 2009-09-29
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Publication No.: US08154900B2Publication Date: 2012-04-10
- Inventor: Chiaming Chai , Jeffrey Herbert Fischer , Michael Thai Thanh Phan
- Applicant: Chiaming Chai , Jeffrey Herbert Fischer , Michael Thai Thanh Phan
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Peter M. Kamarchik; Nicholas J. Pauley; Jonathan T. Velasco
- Main IPC: G11C15/00
- IPC: G11C15/00
Abstract:
Power consumption in a Content Addressable Memory (CAM) circuit is reduced by use of a CAM circuit. According to one embodiment of the CAM circuit, the CAM circuit includes a plurality of match lines and match line restoration circuitry. The match line restoration circuitry is configured to prevent at least one of the match lines from being restored to a pre-evaluation state responsive to corresponding enable information.
Public/Granted literature
- US20100023684A1 METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION IN A CONTENT ADDRESSABLE MEMORY Public/Granted day:2010-01-28
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