Invention Grant
US08155240B2 Receiver circuit, application of a first and a second proportional element of a digital PLL structure, and method for receiving a frequency-shift keyed signal
有权
接收机电路,数字PLL结构的第一和第二比例元件的应用,以及接收频移键控信号的方法
- Patent Title: Receiver circuit, application of a first and a second proportional element of a digital PLL structure, and method for receiving a frequency-shift keyed signal
- Patent Title (中): 接收机电路,数字PLL结构的第一和第二比例元件的应用,以及接收频移键控信号的方法
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Application No.: US12269839Application Date: 2008-11-12
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Publication No.: US08155240B2Publication Date: 2012-04-10
- Inventor: Ulrich Grosskinsky
- Applicant: Ulrich Grosskinsky
- Applicant Address: US CA San Jose
- Assignee: Atmel Corporation
- Current Assignee: Atmel Corporation
- Current Assignee Address: US CA San Jose
- Agency: Baker Botts L.L.P.
- Priority: DE102007054201 20071112
- Main IPC: H03D3/24
- IPC: H03D3/24

Abstract:
A receiver circuit, application of a first proportional element and a second proportional element of a digital PLL structure, and method for receiving a frequency-shift keyed signal are provided. A phase signal is calculated from an in-phase signal and a quadrature signal. A feedback signal is subtracted from the phase signal to form a difference signal. An output signal is determined from the difference signal by a nonlinear transfer function. The output signal is evaluated with an evaluation circuit. A first signal and a second signal are added to form a summation signal. The first signal is produced by multiplication of the output signal or the difference signal by a first proportionality factor. The second signal is produced by multiplication of the output signal or the first signal or the difference signal by a second proportionality factor, followed by integration, and the feedback signal is produced by integration of the summation signal.
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