Methods, apparatus, and systems for generating bit-wise path equivalency information corresponding to 1T decision nodes in a soft output Viterbi algorithm (“SOVA”) decoder operating with an nT clock signal. An add, compare, select circuit (ACS) of the SOVA generates decision data for decision nodes 1T through nT responsive to each nT clock signal pulse. The decision data is applied to corresponding 1T through nT path equivalency detector circuits to generate 1T through nT path equivalency information for generation of soft output signals corresponding to the 1T through nT decision data.