Invention Grant
- Patent Title: Clock and reset synchronization of high-integrity lockstep self-checking pairs
- Patent Title (中): 高完整性锁步自检对的时钟和复位同步
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Application No.: US12485581Application Date: 2009-06-16
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Publication No.: US08156371B2Publication Date: 2012-04-10
- Inventor: Brett D. Oliver , Joseph Caltagirone , Christopher Brickner
- Applicant: Brett D. Oliver , Joseph Caltagirone , Christopher Brickner
- Applicant Address: US NJ Morristown
- Assignee: Honeywell International Inc.
- Current Assignee: Honeywell International Inc.
- Current Assignee Address: US NJ Morristown
- Agency: Fogg & Powers LLC
- Main IPC: G06F11/00
- IPC: G06F11/00

Abstract:
An apparatus comprises first and second modules configured to operate in a lockstep mode and a reset mode. Each of the first and second modules is configured to asynchronously enter the reset mode when a parent reset signal is asserted at the respective each module. Each of the first and second modules is configured to, in response to the asserted parent reset signal being negated at the respective each module, indicate to the respective other module that the respective each module is ready to exit the reset mode and exit the reset mode when the respective other module has also indicated that the respective other module is ready to exit the reset mode.
Public/Granted literature
- US20100318884A1 CLOCK AND RESET SYNCHRONIZATION OF HIGH-INTEGRITY LOCKSTEP SELF-CHECKING PAIRS Public/Granted day:2010-12-16
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