Invention Grant
- Patent Title: Multi-layer chip carrier and process for making
- Patent Title (中): 多层芯片载体和制造工艺
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Application No.: US12256665Application Date: 2008-10-23
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Publication No.: US08163381B2Publication Date: 2012-04-24
- Inventor: Pui-Yan Lin , Govindasamy Paramasivam Rajendran , George Elias Zahr
- Applicant: Pui-Yan Lin , Govindasamy Paramasivam Rajendran , George Elias Zahr
- Applicant Address: US DE Wilmington
- Assignee: E. I. du Pont de Nemours and Company
- Current Assignee: E. I. du Pont de Nemours and Company
- Current Assignee Address: US DE Wilmington
- Main IPC: H05K1/02
- IPC: H05K1/02
Abstract:
Provided, are multi-layer chip carriers comprising an asymmetric cross-linked polymeric dielectric film, and processes for making the chip carriers.
Public/Granted literature
- US20100065314A1 MULTI-LAYER CHIP CARRIER AND PROCESS FOR MAKING Public/Granted day:2010-03-18
Information query
