Invention Grant
- Patent Title: Method of forming isolation layer of semiconductor device
- Patent Title (中): 形成半导体器件隔离层的方法
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Application No.: US11955881Application Date: 2007-12-13
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Publication No.: US08163627B2Publication Date: 2012-04-24
- Inventor: Jung Geun Kim , Eun Soo Kim , Seung Hee Hong , Suk Joong Kim
- Applicant: Jung Geun Kim , Eun Soo Kim , Seung Hee Hong , Suk Joong Kim
- Applicant Address: KR Icheon-si
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Icheon-si
- Agency: Marshall, Gerstein & Borun LLP
- Priority: KR10-2007-0063589 20070627
- Main IPC: H01L21/76
- IPC: H01L21/76

Abstract:
A method of forming an isolation layer of a semiconductor device is disclosed herein, the method comprising the steps of providing a semiconductor substrate in which a tunnel insulating layer and a charge storage layer are formed on an active area and a trench is formed on an isolation area; forming a first insulating layer for filling a lower portion of the trench; forming a porous second insulating layer on the first insulating layer for filling a space between the charge storage layers; forming a third insulating layer on a side wall of the trench and the second insulating layer, the third insulating layer having a density higher than that of the second insulating layer; and forming a porous fourth insulating layer for filling the trench.
Public/Granted literature
- US20090004817A1 METHOD OF FORMING ISOLATION LAYER OF SEMICONDUCTOR DEVICE Public/Granted day:2009-01-01
Information query
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