Invention Grant
- Patent Title: Three-dimensional transistor with double channel configuration
- Patent Title (中): 具有双通道配置的三维晶体管
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Application No.: US12425462Application Date: 2009-04-17
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Publication No.: US08164145B2Publication Date: 2012-04-24
- Inventor: Frank Wirbeleit
- Applicant: Frank Wirbeleit
- Applicant Address: KY Grand Cayman
- Assignee: GlobalFoundries, Inc.
- Current Assignee: GlobalFoundries, Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Williams, Morgan & Amerson, P.C.
- Priority: DE102008030853 20080630
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78

Abstract:
A three-dimensional double channel transistor configuration is provided in which a second channel region may be embedded into the body region of the transistor, thereby providing a three-state behavior, which may therefore increase functionality of conventional three-dimensional transistor architectures. The double channel three-dimensional transistors may be used for forming a static RAM cell with a reduced number of transistors, while also providing scalability by taking advantage of the enhanced controllability of FinFETS and nano pipe transistor architectures.
Public/Granted literature
- US20090321835A1 THREE-DIMENSIONAL TRANSISTOR WITH DOUBLE CHANNEL CONFIGURATION Public/Granted day:2009-12-31
Information query
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