Invention Grant
US08164491B2 Coefficient multiplier and digital delta-sigma modulator using the same
有权
系数乘法器和使用其的数字delta-sigma调制器
- Patent Title: Coefficient multiplier and digital delta-sigma modulator using the same
- Patent Title (中): 系数乘法器和使用其的数字delta-sigma调制器
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Application No.: US12783294Application Date: 2010-05-19
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Publication No.: US08164491B2Publication Date: 2012-04-24
- Inventor: Min Hyung Cho , Yi Gyeong Kim , Jong Kee Kwon
- Applicant: Min Hyung Cho , Yi Gyeong Kim , Jong Kee Kwon
- Applicant Address: KR Daejeon
- Assignee: Electronics and Telecommunications Research Institute
- Current Assignee: Electronics and Telecommunications Research Institute
- Current Assignee Address: KR Daejeon
- Priority: KR10-2009-0124438 20091215
- Main IPC: H03M7/32
- IPC: H03M7/32

Abstract:
Provided are a coefficient multiplier and digital delta-sigma modulator using the same. The coefficient multiplier has the average of output signals of respective dependent multipliers as an effective coefficient using a coefficient averaging technique without employing an adder that has a complex structure and occupies a large chip area. Accordingly, the coefficient multiplier has a simple hardware constitution and small chip area in comparison with a canonical signed digit (CSD) coefficient multiplier, and the digital delta-sigma modulator employing the coefficient multiplier has a simple structure and small size.
Public/Granted literature
- US20110140940A1 COEFFICIENT MULTIPLIER AND DIGITAL DELTA-SIGMA MODULATOR USING THE SAME Public/Granted day:2011-06-16
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