Invention Grant
- Patent Title: Ultra-low power hybrid circuits
- Patent Title (中): 超低功耗混合电路
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Application No.: US12749496Application Date: 2010-03-29
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Publication No.: US08164969B2Publication Date: 2012-04-24
- Inventor: Jeng-Jye Shau
- Applicant: Jeng-Jye Shau
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
The present invention provides a solution to avoid the robustness problems of sub-threshold circuits by switching small parts of circuits to nominal-voltage only when they are being used, and switching them back to sub-threshold levels when the operation finishes. Such “hybrid sub-threshold” approach is capable of supporting ultra-low power operation without the disadvantages of sub-threshold circuits. Hybrid power saving mode for logic circuits provide significant power saving and fast recovery time without performance degradation.
Public/Granted literature
- US20100231292A1 ULTRA-LOW POWER HYBRID CIRCUITS Public/Granted day:2010-09-16
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