A circuit for a computer system, includes a pulse width module (PWM) module and a control circuit. The PWM module is capable of converting a first voltage to a second voltage. The first voltage is capable of decreasing slower than the second voltage to have the PWM module entering in an unwanted state when the computer system is changed from a first state to a second state. The PWM module includes a disabling pin capable of locking the PWM module when a voltage of the disabling pin is low. The control circuit includes a control pin connected to the disabling pin, a ground pin connected to ground, and a monitoring pin capable of monitoring the computer system being changed from a first state to a second state to control the control pin and the ground pin to pull the disabling pin low to lock the PWM module to prevent the PWM module from entering in the unwanted state.