Invention Grant
US08168470B2 Semiconductor device and method of forming vertical interconnect structure in substrate for IPD and baseband circuit separated by high-resistivity molding compound
有权
半导体器件和在由高电阻率模塑料分离的IPD和基带电路的衬底中形成垂直互连结构的方法
- Patent Title: Semiconductor device and method of forming vertical interconnect structure in substrate for IPD and baseband circuit separated by high-resistivity molding compound
- Patent Title (中): 半导体器件和在由高电阻率模塑料分离的IPD和基带电路的衬底中形成垂直互连结构的方法
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Application No.: US12329789Application Date: 2008-12-08
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Publication No.: US08168470B2Publication Date: 2012-05-01
- Inventor: Yaojian Lin , Jianmin Fang , Kang Chen , Haijing Cao
- Applicant: Yaojian Lin , Jianmin Fang , Kang Chen , Haijing Cao
- Applicant Address: SG
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG
- Agency: Patent Law Group: Atkins & Associates P.C.
- Agent Robert D. Atkins
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A semiconductor device is made with a conductive via formed through a top-side of the substrate. The conductive via extends vertically through less than a thickness of the substrate. An integrated passive device (IPD) is formed over the substrate. A plurality of first conductive pillars is formed over the first IPD. A first semiconductor die is mounted over the substrate. An encapsulant is formed around the first conductive pillars and first semiconductor die. A second IPD is formed over the encapsulant. An interconnect structure is formed over the second IPD. The interconnect structure operates as a heat sink. A portion of a back-side of the substrate is removed to expose the first conductive via. A second semiconductor die is mounted to the back-side of the substrate. The second semiconductor die is electrically connected to the first IPD and first semiconductor die through the conductive via.
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