A semiconductor device includes: a plurality of NAND memory dies each including: a first wiring layer formed in the NAND memory die; a second wiring layer formed in the NAND memory die; a first insulation layer formed between the first wiring layer and the second wiring layer; and a first interlayer connector formed in the first insulation layer, a controller configured to control the NAND memory dies; a package housing the NAND memory dies and the controller; a connecting portion electrically connecting an inner side of the package and an outer side of the package; a first connecting wire; and a second connecting wire, wherein a resistance value per unit length of the first interlayer connector is larger than a resistance value per unit length of the first wiring layer, and wherein the first interlayer connector is cut off when a first current flows through the first interlayer connector.