Invention Grant
US08169071B2 Semiconductor device having vertically offset bond on trace interconnects on recessed and raised bond fingers
有权
半导体器件在凹陷和凸起的接合指状物上的迹线互连上具有垂直偏移接合
- Patent Title: Semiconductor device having vertically offset bond on trace interconnects on recessed and raised bond fingers
- Patent Title (中): 半导体器件在凹陷和凸起的接合指状物上的迹线互连上具有垂直偏移接合
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Application No.: US13019562Application Date: 2011-02-02
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Publication No.: US08169071B2Publication Date: 2012-05-01
- Inventor: KiYoun Jang , SungSoo Kim , YongHee Kang
- Applicant: KiYoun Jang , SungSoo Kim , YongHee Kang
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins & Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L23/04
- IPC: H01L23/04

Abstract:
A semiconductor device includes a substrate, a first recessed conductive layer embedded and recessed into a first surface of the substrate, and a first raised conductive layer disposed above the first surface. A first vertical offset exists between an upper surface of the first recessed conductive layer and an upper surface of the first raised conductive layer. The device includes a second recessed conductive layer embedded and recessed into a second surface of the substrate. The second surface of the substrate is opposite the first surface. The device includes a second raised conductive layer disposed beneath the second surface and an interconnect structure disposed on the first recessed and raised conductive layers and the second recessed and raised conductive layers. A second vertical offset exists between a lower surface of the second recessed conductive layer and a lower surface of the second recessed conductive layer.
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