Invention Grant
US08169203B1 Low dropout regulator 有权
低压差稳压器

Low dropout regulator
Abstract:
A low-drop out (LDO) regulator circuit is provided having a gate of a pass transistor coupled to an output of an operational transconductance amplifier, the LDO regulator exhibiting a non-dominant pole at an output of the LDO. A dynamic zero-compensation circuit is coupled in parallel to the pass transistor. A compensation control circuit is coupled and configured to adjust a frequency, at which a zero is generated, and cause the generated zero to track with the non-dominant pole.
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