Invention Grant
- Patent Title: Low dropout regulator
- Patent Title (中): 低压差稳压器
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Application No.: US12950220Application Date: 2010-11-19
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Publication No.: US08169203B1Publication Date: 2012-05-01
- Inventor: Madan Mohan Reddy Vemula
- Applicant: Madan Mohan Reddy Vemula
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Main IPC: G05F1/40
- IPC: G05F1/40

Abstract:
A low-drop out (LDO) regulator circuit is provided having a gate of a pass transistor coupled to an output of an operational transconductance amplifier, the LDO regulator exhibiting a non-dominant pole at an output of the LDO. A dynamic zero-compensation circuit is coupled in parallel to the pass transistor. A compensation control circuit is coupled and configured to adjust a frequency, at which a zero is generated, and cause the generated zero to track with the non-dominant pole.
Public/Granted literature
- US20120126760A1 LOW DROPOUT REGULATOR Public/Granted day:2012-05-24
Information query
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