Invention Grant
- Patent Title: Apparatus and method for generating resistance calibration code in semiconductor integrated circuit
- Patent Title (中): 在半导体集成电路中产生电阻校准码的装置和方法
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Application No.: US12478201Application Date: 2009-06-04
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Publication No.: US08169232B2Publication Date: 2012-05-01
- Inventor: Sang Jin Byeon
- Applicant: Sang Jin Byeon
- Applicant Address: KR Gyeonggi-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2008-0077710 20080808
- Main IPC: H03K17/16
- IPC: H03K17/16 ; H03K19/003 ; H03K19/094 ; H03K3/00 ; H03B1/00
Abstract:
A resistance calibration code generating apparatus includes a code calibration unit configured to calibrate and output code values of a resistance calibration code during predetermined cycles of a calibration clock, which are determined by a code calibration time control command, and a calibration clock generating unit configured to output the calibration clock using a code calibration command.
Public/Granted literature
- US20100036634A1 APPARATUS AND METHOD FOR GENERATING RESISTANCE CALIBRATION CODE IN SEMICONDUCTOR INTEGRATED CIRCUIT Public/Granted day:2010-02-11
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