Invention Grant
US08169807B2 Content addressable memory device having match line equalizer circuit
有权
具有匹配线均衡器电路的内容可寻址存储器件
- Patent Title: Content addressable memory device having match line equalizer circuit
- Patent Title (中): 具有匹配线均衡器电路的内容可寻址存储器件
-
Application No.: US12261598Application Date: 2008-10-30
-
Publication No.: US08169807B2Publication Date: 2012-05-01
- Inventor: Katsumi Dosaka , Kazutami Arimoto , Yoshio Matsuda
- Applicant: Katsumi Dosaka , Kazutami Arimoto , Yoshio Matsuda
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: McDermott Will & Emery LLP
- Priority: JP2007-283462 20071031
- Main IPC: G11C15/00
- IPC: G11C15/00

Abstract:
In a content addressable memory device, before search operations in two TCAM cells connected to first and second match lines, respectively, a memory controller connects the first match line to a power source and connects the second match line to a ground, and then connects the first and second match lines to each other so as that electric potentials of the first and second match lines are the same as each other.
Public/Granted literature
- US20090113122A1 CONTENT ADDRESSABLE MEMORY DEVICE HAVING MATCH LINE EQUALIZER CIRCUIT Public/Granted day:2009-04-30
Information query