Invention Grant
US08169829B2 Memory controller, memory system, recording and reproducing method for memory system, and recording apparatus
失效
存储器控制器，存储系统，存储系统的记录和再现方法以及记录装置
- Patent Title: Memory controller, memory system, recording and reproducing method for memory system, and recording apparatus
- Patent Title (中): 存储器控制器，存储系统，存储系统的记录和再现方法以及记录装置
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Application No.: US13082981Application Date: 2011-04-08
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Publication No.: US08169829B2Publication Date: 2012-05-01
- Inventor: Takeaki Sato
- Applicant: Takeaki Sato
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2008-188893 20080722
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G11C16/04 ; G11C16/06 ; G11C8/00
Abstract:
A memory system has a memory unit that is made of memory cells, each of which assumes a record state with a threshold voltage according to data. If an inverter has performed reverse processing on a data sequence so as to make the number of the memory cells in a predetermined record state great based on a count of a counter in a record operation, the memory system sets a flag added to the data sequence to indicate that the reverse processing has been performed, and performs re-reverse processing on the data sequence to which the flag indicating that the inverter has performed the reverse processing is added in a reproducing operation.
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