Invention Grant
US08169843B2 Wafer test trigger signal generating circuit of a semiconductor memory apparatus, and a wafer test circuit using the same
有权
半导体存储装置的晶片测试触发信号发生电路，以及使用其的晶片测试电路
- Patent Title: Wafer test trigger signal generating circuit of a semiconductor memory apparatus, and a wafer test circuit using the same
- Patent Title (中): 半导体存储装置的晶片测试触发信号发生电路，以及使用其的晶片测试电路
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Application No.: US12347213Application Date: 2008-12-31
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Publication No.: US08169843B2Publication Date: 2012-05-01
- Inventor: Hyung-Wook Moon
- Applicant: Hyung-Wook Moon
- Applicant Address: KR
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR
- Agency: Baker & McKenzie LLP
- Priority: KR10-2008-0103289 20081021
- Main IPC: G11C7/00
- IPC: G11C7/00 ; G11C29/00
Abstract:
A wafer test trigger signal generating circuit of a semiconductor memory apparatus includes an enable timing control unit configured to generate an enable signal by using a plurality of address signals, and a trigger signal generating unit configured to generate a test trigger signal, which designates a decoding timing of a test mode defined by the plurality of address signals, in response to the enable signal.
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