A code synchronization circuit for a delay time measurement device used in a low C/N environment is provided. The code synchronization circuit is capable of high precision timing phase measurement and stable operation against variations in the reception level. For these purposes, the code synchronization circuit includes: a numeric control frequency variable oscillation section (5) for generating a clock signal with a variable frequency; a 2-divider (23) for dividing the clock signal by 2 to generate a component code signal (X); a T/2 delay device (4) for outputting a delayed component code signal (x) lagging in phase behind the component code signal (X) by half a bit; and a second correlator (3B) for outputting a second correlation value indicating similarity between the delayed component code signal (x) and the carrier signal, where the numeric control frequency variable oscillation section (5) controls the frequency of the clock signal according to the second correlation value so that the carrier signal and the clock signal are in sync.