Invention Grant
- Patent Title: Memory system
- Patent Title (中): 内存系统
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Application No.: US12529126Application Date: 2009-02-10
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Publication No.: US08171208B2Publication Date: 2012-05-01
- Inventor: Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda
- Applicant: Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2008-051481 20080301
- International Application: PCT/JP2009/052594 WO 20090210
- International Announcement: WO2009/110301 WO 20090911
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
A memory system includes a DRAM 20 that performs writing and readout in a unit equal to or smaller than a cluster, a NAND memory 10 that performs writing and readout in a page unit, and a management table group in which management information including storage locations of data stored in the DRAM 20 and the NAND memory 10 is stored. When a readout request is received from the outside, a data managing unit 120 notifies, when an unwritten logical address area is present in a storage area of the NAND memory to which a logical address area requested to be read out is mapped, fixed data stored in the DRAM 20 to the outside in association with the logical address area.
Public/Granted literature
- US20100312948A1 MEMORY SYSTEM Public/Granted day:2010-12-09
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