Invention Grant
- Patent Title: Cache for a multi thread and multi core system and methods thereof
- Patent Title (中): 多线程和多核系统的缓存及其方法
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Application No.: US11770120Application Date: 2007-06-28
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Publication No.: US08171225B2Publication Date: 2012-05-01
- Inventor: Thomas A Piazza , Michael K Dwyer , Scott Cheng
- Applicant: Thomas A Piazza , Michael K Dwyer , Scott Cheng
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Grossman, Tucker, Perreault & Pfleger, PLLC
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
A method includes storing a plurality of data RAM, holding information for all outstanding requests forwarded to a next-level memory subsystem, clearing information associated with a serviced request after the request has been fulfilled, determining if a subsequent request matches an address supplied to one or more requests already in-flight to the next-level memory subsystem, matching fulfilled requests serviced by the next-level memory subsystem to at least one requester who issued requests while an original request was in-flight to the next level memory subsystem, storing information specific to each request comprising a set attribute and a way attribute configured to identify where the returned data should be held in the data RAM once the data is returned, the information specific to each request further including at least one of thread ID, instruction queue position and color, and scheduling hit and miss data returns.
Public/Granted literature
- US20090006729A1 CACHE FOR A MULTI THREAD AND MULTI CORE SYSTEM AND METHODS THEREOF Public/Granted day:2009-01-01
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