Invention Grant
- Patent Title: Method of manufacturing metal wiring and method of manufacturing semiconductor device
- Patent Title (中): 制造金属布线的方法和制造半导体器件的方法
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Application No.: US12357533Application Date: 2009-01-22
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Publication No.: US08173478B2Publication Date: 2012-05-08
- Inventor: Koji Ono , Hideomi Suzawa
- Applicant: Koji Ono , Hideomi Suzawa
- Applicant Address: JP
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP
- Agency: Husch Blackwell LLP
- Priority: JP2001-227047 20010727
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A metal wiring suitable for a substrate of large size is provided. The present invention is characterized in that at least one layer of conductive film is formed on an insulating surface, a resist pattern is formed on the conductive film, and the conductive film having the resist pattern is etched to form a metal wiring while controlling its taper angle α in accordance with the bias power density, the ICP power density, the temperature of lower electrode, the pressure, the total flow rate of etching gas, or the ratio of oxygen or chlorine in etching gas. The thus formed metal wiring has less fluctuation in width or length and can satisfactorily deal with an increase in size of substrate.
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