Invention Grant
- Patent Title: Method of fabricating gate electrode using a treated hard mask
- Patent Title (中): 使用经处理的硬掩模制造栅电极的方法
-
Application No.: US12758491Application Date: 2010-04-12
-
Publication No.: US08173504B2Publication Date: 2012-05-08
- Inventor: Matt Yeh , Fan-Yi Hsu , Shun Wu Lin , Hui Ouyang , Chi-Ming Yang
- Applicant: Matt Yeh , Fan-Yi Hsu , Shun Wu Lin , Hui Ouyang , Chi-Ming Yang
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Agency: Lowe Hauptman Ham & Berner, LLP
- Main IPC: H01L21/8238
- IPC: H01L21/8238

Abstract:
A method for fabricating an integrated device is disclosed. A polysilicon gate electrode layer is provided on a substrate. In an embodiment, a treatment is provided on the polysilicon gate electrode layer to introduce species in the gate electrode layer and form an electrically neutralized portion therein. Then, a hard mask layer with limited thickness is applied on the treated polysilicon gate electrode layer. A tilt angle ion implantation is thus performing on the substrate after patterning the hard mask layer and the treated polysilicon gate electrode to from a gate structure.
Public/Granted literature
- US20110250725A1 METHOD OF FABRICATING GATE ELECTRODE USING A TREATED HARD MASK Public/Granted day:2011-10-13
Information query
IPC分类: