Invention Grant
US08173532B2 Semiconductor transistors having reduced distances between gate electrode regions
有权
半导体晶体管具有减小栅电极区域之间的距离
- Patent Title: Semiconductor transistors having reduced distances between gate electrode regions
- Patent Title (中): 半导体晶体管具有减小栅电极区域之间的距离
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Application No.: US11830090Application Date: 2007-07-30
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Publication No.: US08173532B2Publication Date: 2012-05-08
- Inventor: Robert C. Wong , Haining S. Yang
- Applicant: Robert C. Wong , Haining S. Yang
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Schmeiser, Olsen & Watts
- Agent Ian D. MacKinnon
- Main IPC: H01L21/3205
- IPC: H01L21/3205 ; H01L21/4763 ; H01L21/461 ; H01L21/8244 ; H01L21/302 ; H01L27/118 ; H01L27/088 ; H01L27/11

Abstract:
A semiconductor structure and a method for forming the same. The method includes providing a semiconductor structure which includes a semiconductor substrate. The semiconductor substrate includes (i) a top substrate surface which defines a reference direction perpendicular to the top substrate surface and (ii) first and second semiconductor body regions. The method further includes forming (i) a gate divider region and (ii) a gate electrode layer on top of the semiconductor substrate. The gate divider region is in direct physical contact with gate electrode layer. A top surface of the gate electrode layer and a top surface of the gate divider region are essentially coplanar. The method further includes patterning the gate electrode layer resulting in a first gate electrode region and a second gate electrode region. The gate divider region does not overlap the first and second gate electrode regions in the reference direction.
Public/Granted literature
- US20090032886A1 SEMICONDUCTOR TRANSISTORS HAVING REDUCED DISTANCES BETWEEN GATE ELECTRODE REGIONS Public/Granted day:2009-02-05
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