Invention Grant
US08173536B2 Semiconductor device and method of forming column interconnect structure to reduce wafer stress 有权
半导体器件和形成柱互连结构以减少晶片应力的方法

Semiconductor device and method of forming column interconnect structure to reduce wafer stress
Abstract:
An interconnect pad is formed over a first substrate. A photoresist layer is formed over the first substrate and interconnect pad. A portion of the photoresist layer is removed to form a channel and expose a perimeter of the interconnect pad while leaving the photoresist layer covering a central area of the interconnect pad. A first conductive material is deposited in the channel of the photoresist layer to form a column of conductive material. The remainder of the photoresist layer is removed. A masking layer is formed around the column of conductive material while exposing the interconnect pad within the column of conductive material. A second conductive material is deposited over the first conductive layer. The second conductive material extends above the column of conductive material. The masking layer is removed. The second conductive material is reflowed to form a column interconnect structure over the semiconductor device.
Information query
Patent Agency Ranking
0/0