Silicon etch with passivation using plasma enhanced oxidation

Invention Grant

US08173547B2 Silicon etch with passivation using plasma enhanced oxidation 有权

Title translation: 使用等离子体增强氧化的钝化硅蚀刻

Please log in to see more content

Patent Title: Silicon etch with passivation using plasma enhanced oxidation
Patent Title (中): 使用等离子体增强氧化的钝化硅蚀刻
Application No.: US12257210

Application Date: 2008-10-23
Publication No.: US08173547B2

Publication Date: 2012-05-08
Inventor: Jaroslaw W. Winniczek , Robert P. Chebi
Applicant: Jaroslaw W. Winniczek , Robert P. Chebi
Applicant Address: US CA Fremont
Assignee: Lam Research Corporation
Current Assignee: Lam Research Corporation
Current Assignee Address: US CA Fremont
Agency: Beyer Law Group LLP
Main IPC: H01L21/311
IPC: H01L21/311

Silicon etch with passivation using plasma enhanced oxidation

Abstract:

A method and apparatus for etching a silicon layer through a patterned mask formed thereon are provided. The silicon layer is placed in an etch chamber. An etch gas comprising a fluorine containing gas and an oxygen and hydrogen containing gas is provided into the etch chamber. A plasma is generated from the etch gas and features are etched into the silicon layer using the plasma. The etch gas is then stopped. The plasma may contain OH radicals.

Abstract(Chinese):

提供了通过形成在其上的图案化掩模来蚀刻硅层的方法和装置。将硅层放置在蚀刻室中。包括含氟气体和含氧和氢气的气体的蚀刻气体被提供到蚀刻室中。从蚀刻气体产生等离子体，并且使用等离子体将特征蚀刻到硅层中。然后停止蚀刻气体。等离子体可能含有OH自由基。

Public/Granted literature

US20100105209A1 SILICON ETCH WITH PASSIVATION USING PLASMA ENHANCED OXIDATION Public/Granted day:2010-04-29

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/18	...器件有由周期表Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体，如掺杂材料
H01L21/30	....用H01L21/20至H01L21/26各组不包含的方法或设备处理半导体材料的（在半导体材料上制作电极的入H01L21/28）
H01L21/31	.....在半导体材料上形成绝缘层的，例如用于掩膜的或应用光刻技术的（密封层入H01L21/56）；以及这些层的后处理；这些层的材料的选择
H01L21/3105	......后处理
H01L21/311	.......绝缘层的刻蚀