Invention Grant
- Patent Title: Semiconductor arrangement having specially fashioned bond wires
- Patent Title (中): 半导体装置具有特殊的接合线
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Application No.: US12481255Application Date: 2009-06-09
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Publication No.: US08174104B2Publication Date: 2012-05-08
- Inventor: Pascal Stumpf
- Applicant: Pascal Stumpf
- Applicant Address: DE Freiburg
- Assignee: Micronas GmbH
- Current Assignee: Micronas GmbH
- Current Assignee Address: DE Freiburg
- Agency: Muncy, Geissler, Olds & Lowe, PLLC
- Priority: EP08010430 20080609
- Main IPC: H01L23/52
- IPC: H01L23/52 ; H01L21/50

Abstract:
A semiconductor arrangement includes first and second integrated circuits (dies), an electrically conductive intermediate element, and one or more bond conductors. The first and the second integrated circuits are arranged in a package. The first integrated circuit has a first contact pad. The second integrated circuit has a second contact pad. The intermediate element is disposed on the second contact pad. The conductors electrically connect the first and the second integrated circuits. At least one of the bond conductors has a first end electrically connected to the first contact pad, and a second wedge shaped end electrically connected to the intermediate element. The bond conductor is made of a first material and the intermediate element is made of a second material which is softer than the first material.
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Information query
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