Invention Grant
US08174116B2 Spacer, and its manufacturing method 有权
隔板及其制造方法

  • Patent Title: Spacer, and its manufacturing method
  • Patent Title (中): 隔板及其制造方法
  • Application No.: US12674761
    Application Date: 2008-08-25
  • Publication No.: US08174116B2
    Publication Date: 2012-05-08
  • Inventor: Koichiro MasudaTooru Mori
  • Applicant: Koichiro MasudaTooru Mori
  • Applicant Address: JP Tokyo
  • Assignee: NEC Corporation
  • Current Assignee: NEC Corporation
  • Current Assignee Address: JP Tokyo
  • Agency: Sughrue Mion, PLLC
  • Priority: JP2007-218546 20070824; JP2007-264835 20071010
  • International Application: PCT/JP2008/065117 WO 20080825
  • International Announcement: WO2009/028463 WO 20090305
  • Main IPC: H01L23/34
  • IPC: H01L23/34
Spacer, and its manufacturing method
Abstract:
Provided are a spacer capable of avoiding a poor connection due to the suction of solder when the clearance width between a soldered semiconductor device and a printed circuit board is made constant, and a manufacturing method for the spacer. The spacer includes an electrically insulating base member, and at least one solder guiding terminal. The base member has a bottom face, a top face and at least one side face, of which the bottom face and the top face are out of contact with each other whereas the side face contacts one or both the bottom face and the top face. The solder guiding terminal covers the bottom face partially, the top face partially, and the side face partially or wholly. A solder guiding face as the surface of a portion of the solder guiding terminal covering the side face is not normal to the bottom face.
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