Invention Grant
- Patent Title: Semiconductor integrated circuit
- Patent Title (中): 半导体集成电路
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Application No.: US12647135Application Date: 2009-12-24
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Publication No.: US08174123B2Publication Date: 2012-05-08
- Inventor: Hideo Sonohara, Sr.
- Applicant: Hideo Sonohara, Sr.
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Young & Thompson
- Priority: JP2008-327984 20081224
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
A semiconductor integrated circuit according to an exemplary embodiment of the present invention includes an I/O buffer provided in a semiconductor chip, single-layer pads, and multilayer pads. The single-layer pads are formed above the I/O buffer. The multilayer pads are formed above the I/O buffer separately from the single-layer pads. The single-layer pads are pads dedicated to bonding, and the multilayer pads are pads on which both probing and bonding are performed.
Public/Granted literature
- US20100155726A1 SEMICONDUCTOR INTEGRATED CIRCUIT Public/Granted day:2010-06-24
Information query
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