Invention Grant
- Patent Title: Integrated circuit package system employing device stacking
- Patent Title (中): 集成电路封装系统采用器件堆叠
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Application No.: US13039311Application Date: 2011-03-03
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Publication No.: US08174127B2Publication Date: 2012-05-08
- Inventor: Frederick Rodriguez Dahilig , Sheila Marie L. Alvarez , Antonio B. Dimaano, Jr. , Dioscoro A. Merilo
- Applicant: Frederick Rodriguez Dahilig , Sheila Marie L. Alvarez , Antonio B. Dimaano, Jr. , Dioscoro A. Merilo
- Applicant Address: SG Singapore
- Assignee: Stats Chippac Ltd.
- Current Assignee: Stats Chippac Ltd.
- Current Assignee Address: SG Singapore
- Agent Mikio Ishimaru
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L29/41 ; H01L21/58 ; H01L21/60
Abstract:
A method of manufacturing an integrated circuit packaging system includes: providing an inner lead and an outer lead, the inner lead having an inner peripheral side with a non-linear contour; forming a bump contact, having a groove in and a mesa from the inner lead or the outer lead, the groove adjacent to the mesa; mounting a first device adjacent to the inner lead; connecting a second device to the mesa; and forming an encapsulation material over the first device, the inner lead, and the outer lead and covering the second device.
Public/Granted literature
- US20110147899A1 INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING DEVICE STACKING Public/Granted day:2011-06-23
Information query
IPC分类:
