Invention Grant
US08174282B2 Leak current detection circuit, body bias control circuit, semiconductor device, and semiconductor device testing method
有权
泄漏电流检测电路，体偏置控制电路，半导体器件和半导体器件测试方法
- Patent Title: Leak current detection circuit, body bias control circuit, semiconductor device, and semiconductor device testing method
- Patent Title (中): 泄漏电流检测电路，体偏置控制电路，半导体器件和半导体器件测试方法
-
Application No.: US12576670Application Date: 2009-10-09
-
Publication No.: US08174282B2Publication Date: 2012-05-08
- Inventor: Kiyonaga Fujii , Yasushige Ogawa
- Applicant: Kiyonaga Fujii , Yasushige Ogawa
- Applicant Address: JP Yokohama
- Assignee: Fujitsu Semiconductor Limited
- Current Assignee: Fujitsu Semiconductor Limited
- Current Assignee Address: JP Yokohama
- Agency: Fujitsu Patent Center
- Main IPC: G01R31/02
- IPC: G01R31/02 ; G01R31/28
Abstract:
A leak current detection circuit that improves the accuracy for detecting a leak current in a MOS transistor without enlarging the circuit scale. The leak current detection circuit includes at least one P-channel MOS transistor which is coupled to a high potential power supply and which is normally inactivated and generates a first leak current, at least one N-channel MOS transistor which is coupled between a low potential power and at least the one P-channel MOS transistor and which is normally inactivated and generates a second leak current, and a detector which detects a potential generated at a node between the at least one P-channel MOS transistor and the at least one N-channel MOS transistor in accordance with the first and second leak currents.
Public/Granted literature
Information query
