Invention Grant
- Patent Title: Configurable buffer circuits and methods
- Patent Title (中): 可配置缓冲电路和方法
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Application No.: US12910177Application Date: 2010-10-22
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Publication No.: US08174294B1Publication Date: 2012-05-08
- Inventor: Weiqi Ding , Yanjing Ke , Sergey Shumarayev
- Applicant: Weiqi Ding , Yanjing Ke , Sergey Shumarayev
- Applicant Address: US CA San Jose
- Assignee: Altera Corporation
- Current Assignee: Altera Corporation
- Current Assignee Address: US CA San Jose
- Agent Steven J. Cahill
- Main IPC: H03B1/00
- IPC: H03B1/00

Abstract:
A buffer circuit includes a current source circuit, first and second switch circuits that are coupled to the current source circuit, a first resistor coupled to the first switch circuit, a second resistor coupled to the second switch circuit, and a third switch circuit coupled to the first and the second resistors. The third switch circuit couples the first and the second resistors to a node at a first voltage when the buffer circuit is configured to function in a current mode logic buffer mode. The third switch circuit couples the first and the second resistors to a node at a second voltage when the buffer circuit is configured to function in an H-bridge buffer mode.
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