Invention Grant
- Patent Title: Semiconductor integrated circuit device
- Patent Title (中): 半导体集成电路器件
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Application No.: US12721553Application Date: 2010-03-10
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Publication No.: US08174901B2Publication Date: 2012-05-08
- Inventor: Ken Matsubara , Hideo Kasai , Kenji Kawada , Makoto Mizuno
- Applicant: Ken Matsubara , Hideo Kasai , Kenji Kawada , Makoto Mizuno
- Applicant Address: JP Kawasaki-shi
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi
- Agency: Miles & Stockbridge P.C.
- Priority: JP2009-058894 20090312
- Main IPC: G11C11/34
- IPC: G11C11/34

Abstract:
This invention is to reduce the number of memory gate drivers, while lessening the number of times of disturb occurrence in a memory array configuration that implements writing in small byte units. A memory array comprises a plurality of sub-arrays, MG transfers, SL drivers, and CG drivers. Each sub-array includes a plurality of memory gate lines, control gate lines, source lines, and bit lines. Memory cells are arranged in positions of intersections of these lines. The control gate lines, CG drivers, source lines, and SL drivers are common to the sub-arrays, whereas the memory gate lines and MG buffer circuits are provided for each sub-array. Thereby, the units in which data is written are decreased and adverse effects of disturb are reduced without increasing the circuit size of the memory array.
Public/Granted literature
- US20100232232A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE Public/Granted day:2010-09-16
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