Invention Grant
- Patent Title: Nonvolatile semiconductor memory and method for testing the same
- Patent Title (中): 非易失性半导体存储器及其测试方法
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Application No.: US13067728Application Date: 2011-06-22
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Publication No.: US08174909B2Publication Date: 2012-05-08
- Inventor: Satoru Oku
- Applicant: Satoru Oku
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2008-311970 20081208
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
A nonvolatile semiconductor memory, includes a nonvolatile memory array, a voltage generator circuit that generates a drive voltage which changes depending on a supply voltage and a code, a control circuit that applies the generated drive voltage to the nonvolatile memory array, and a code output circuit that outputs any one of a plurality of codes to the voltage generator circuit, wherein the plurality of codes includes a first code and a second code, wherein the second code is different from the first code, wherein, in a first state, the code output circuit outputs the first code to the voltage generator circuit, and the voltage generator circuit generates the drive voltage according to the first code, and wherein, in a second state, the code output circuit outputs the second code to the voltage generator circuit, and the voltage generator circuit generates the drive voltage according to the second code.
Public/Granted literature
- US20110255340A1 Nonvolatile semiconductor memory and method for testing the same Public/Granted day:2011-10-20
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