Invention Grant
- Patent Title: Voltage-stepped low-power memory device
- Patent Title (中): 电压阶梯型低功耗存储器件
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Application No.: US12680986Application Date: 2008-07-22
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Publication No.: US08174923B2Publication Date: 2012-05-08
- Inventor: Frederick A. Ware , Yoshihito Koya
- Applicant: Frederick A. Ware , Yoshihito Koya
- Applicant Address: US CA Sunnyvale
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Park, Vaughan, Fleming & Dowler LLP
- International Application: PCT/US2008/070758 WO 20080722
- International Announcement: WO2009/061532 WO 20090514
- Main IPC: G11C5/14
- IPC: G11C5/14 ; G11C11/24

Abstract:
This disclosure has described a system for charging a capacitive energy storage device of at least one memory cell within an integrated circuit device from an initial voltage to a final voltage, wherein the integrated circuit device includes a plurality of memory cells which are formed at least in part by capacitive energy storage devices. During operation, the system charges the capacitive energy storage device from the initial voltage to the final voltage stepwise through one or more progressively higher intermediate voltage levels using one or more voltage sources. Specifically, each intermediate voltage level is between the initial voltage and the final voltage, and each voltage source generates a respective intermediate voltage level. Note that charging the capacitive energy storage device through one or more intermediate voltage levels reduces energy dissipation during the charging process.
Public/Granted literature
- US20100214822A1 VOLTAGE-STEPPED LOW-POWER MEMORY DEVICE Public/Granted day:2010-08-26
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