Invention Grant
- Patent Title: Receiver with clock drift compensation
- Patent Title (中): 接收器带时钟漂移补偿
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Application No.: US11503408Application Date: 2006-08-11
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Publication No.: US08175202B2Publication Date: 2012-05-08
- Inventor: Pietro Capretta , Steven Terryn , Jean-Jacques Schmit
- Applicant: Pietro Capretta , Steven Terryn , Jean-Jacques Schmit
- Applicant Address: CH Plan-les-Ouates
- Assignee: ST-Ericsson SA
- Current Assignee: ST-Ericsson SA
- Current Assignee Address: CH Plan-les-Ouates
- Agency: Wolf, Greenfield & Sacks, P.C.
- Priority: EP05447182 20050812
- Main IPC: H04B1/10
- IPC: H04B1/10

Abstract:
A receiver is described including circuitry for deriving at least a first stream of first digitized samples from a received analog signal at a first sampling rate, circuitry for selecting a first sampling point and at least a second sampling point, a demodulator for demodulating first and second symbols from the at least first stream of samples based on the first and the at least second sampling points, and circuitry for determining a value related to a demodulation accuracy for the first and second symbols and for outputting a signal, the circuitry for selecting being adapted to alter the sampling point based on the signal. By assessing a demodulation accuracy in real time clock drift can be compensated. The demodulation accuracy can be a value related to a phase error or an error energy such as EVM or DEVM for each demodulated symbol.
Public/Granted literature
- US20070036252A1 Receiver with clock drift compensation Public/Granted day:2007-02-15
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