A system and method for configuring threshold values for fixed time delay counters of a System on a Chip (SoC) uses a reference clock signal and one or more frequency sub-range control signals corresponding to a frequency sub-range of the reference clock signal. A frequency sub-range of the reference clock signal is determined using the frequency sub-range control signals and the determined frequency sub-range is used to select a counter threshold value. The selected counter threshold value is provided to a counter and the counter then is updated at each cycle of the reference clock signal for a predetermined count based on the counter threshold value.